About
Hsinchu, Taiwan
About VLSIShuttle
VLSIShuttle is based in Hsinchu, Taiwan. We operate as the execution owner from netlist to tapeout, coordinating both backend implementation and foundry submission. Execution responsibility, not fragmented services.
Execution Focus
One accountable backend team from netlist handoff through foundry-accepted GDS. Timing closure, DFT integration, physical verification, and tapeout coordination — owned end to end, not distributed across contractors.
Engineering Capabilities
Backend Implementation Track Record
30+ tapeout deliveries across communication, sensor, power management, and IoT domains. Process coverage from 180nm to 22nm across TSMC, SMIC, UMC, and Tower.
Experienced Engineering Team
30+ engineers, 12 core members with 15+ years of DFT and physical implementation experience from HiSilicon, AMD, NVIDIA, and VeriSilicon.
Full Backend Scope
RTL-to-GDS execution including floorplanning, place and route, multi-corner signoff, DRC/LVS closure, and foundry submission package preparation.
DFT and Signoff Depth
15+ years of DFT integration and signoff experience on complex mixed-signal and digital designs. STA, IR/EM, and physical verification handled in-house.
Technical Depth
DFT Integration & Test
Scan chain insertion, ATPG pattern generation, BIST integration, and test coverage analysis for complex digital and mixed-signal designs.
Physical Implementation
Floorplanning, place and route (Cadence Innovus / Synopsys ICC2), clock tree synthesis, and multi-corner timing closure across process nodes.
STA & IR Analysis
Multi-corner multi-mode static timing analysis, OCV derating, IR drop and EM validation to ensure silicon-accurate signoff.
PI & SI Analysis
Power integrity and signal integrity analysis for high-speed interfaces, ensuring design stability and performance targets are met on silicon.
Discuss Tapeout Scope
Send node, die size, and schedule for initial technical feedback
Discuss Tapeout Scope